Graphic controllers are used by computers and other graphic-intensive devices such as video game consoles for controlling the image that is displayed on an image device, such as a CRT, LCD panel, or plasma display. Generally speaking, graphic controllers are responsible for translating information received in one resolution to a second resolution that is native to the display device. For example, if the video input signals are in the standard video 640×480 pixel resolution, but the actual display device is an HDTV display resolution having 1024×784 pixels, then the graphics controller is required to upscale the input video information to the 1024×784 format used by the display device. Alternatively, the graphics controller is required to downscale the video information when the input video information has a greater resolution than the display device.
The video input information provided to a graphics controller typically includes both color information signals and timing signals. The color information signals are typically three separate signals representing the colors red, blue and green (i.e., “RGB”) respectively. For each pixel, the magnitude of each signal represents the amount of red, blue and green to be displayed per pixel. When combined, the three signals are capable of generating the full color spectrum, depending on the magnitude of each color signal. The timing signals are horizontal or Hsync and vertical or Vsync. The Hsync signal defines the start time and end time for displaying a horizontal line on the display. The Vsync signal defines the start time and end time of each frame.
The graphics controller is responsible for generating the output signals, in response to the input signals, necessary to generate the desired output on the display device. These signals typically include a 24 bit RGB signal that defines the color for each pixel on the display, Hsync and Vsync signals, a data enable DE signal, and display clock CLK signal. For example, the current HDTV standard defines a pixel display having a resolution of 1024×784. Each frame therefore has 784 horizontal lines from top to bottom of the display. Each horizontal line has 1024 pixels. Each pulse of the Hsync signal represents the start of a new row. For each row, the CLK clock is pulsed 1024 times. With each pulse, a 24 bit RGB signal that defines the color for each pixel is generated. With progressive scan, the Vsync signal is pulsed after the 784 rows are displayed to designate the start of a new frame. The data enable signal DE is typically used only for raster type display devices. The DE signal is reset to disable the display during retracing or blanking. Although the data enable signal is not needed for non-raster type displays such as plasma or LCD panels, most graphic controllers retain this signal to be backwards compatible with older display devices such as standard televisions or CRTs.
Graphic controllers include a processing module to perform the translation from the input to the output resolutions. One responsibility of the processing module is to detect the resolution of the input video information. This is typically done by analyzing the timing between pulses of the input Hsync and Vsync signals. The Hsync and Vsync signals are first passed through an on-chip regenerative circuit, such as a Schmitt trigger, before being provided to the processing module. Based on the measured time duration between pulses, the processing module determines the resolution of the input video information.
Glitches in the Hsync and/or Vsync signals provided to the inputs of the graphic controller may cause the processing module to make an error in computing the wrong resolution of the input signals. For example, a sync signal may have a “shoulder” on the rising edge at a voltage level somewhere between zero volts and Vdd. Similarly, the signal may have a shoulder between Vdd and zero on the falling edge. If the shoulder occurs at or near the trigger points of the Schmitt trigger, the regenerated output of the synch signal may also contain glitches. The processing module may therefore misinterpret a glitch as a “false pulse”, and as a consequence, compute the wrong resolution of the input.
An apparatus and method for processing Hsync and Vsync signals in graphic controllers to avoid a false reading of pulses caused by glitches is therefore needed.